Faster GE sync and memory-to-memory DMA

2026-07-31 - Faster GE sync and memory-to-memory DMA

Cut CPU and GE synchronization latency by nearly half. Waits now spin briefly before sleeping and completed jobs are reclaimed lazily, taking a sync from 156 µs at best down to 85 µs, measured over twenty sustained runs against the previous kernel. Bandwidth is unchanged, at the cost of about 2% on a synthetic pipelined ceiling no real workload sustains.
The DMA controller now supports memory-to-memory transfers alongside peripheral transfers. Validated on hardware with dmatest: 1500 copies, no failures. WonderMedia never implemented this capability, making it a first for the WM8505.
DMA driver correctness: termination now halts the channel before its memory is freed, queued transfers always raise their completion interrupt, and device-tree request lines are validated instead of silently truncated.
Graphics driver correctness: fills and blits are restricted to the four raster operations userspace uses, since a fill programs no source and could read stale addresses. Vblank events are stamped after the counter advances, the scanout width limit derives from the hardware register field, and unbinding the driver fails open clients cleanly.
The Innolux AT070TN92 panel mode now matches the datasheet timings exactly. The sync pulse widths were inherited values and the blanking figures were split wrongly between sync and back porch. The frame rate is unchanged at 60.06 Hz.
X.org driver correctness: the root pixmap is rebound each server generation, depth 32 pixmaps stay in software, failed synchronization no longer marks buffers clean, and pending flips are drained before mode changes and resolved from kernel state instead of a poll.
PS/2 driver correctness: keyboard and touchpad commands are serialized, since both ports share one controller. The flush no longer sleeps in atomic context and closing a port drains the shared output buffer.
Kernel updated to 6.12.100.
Refreshed standard and desktop images.